Content pfp
Content
@
0 reply
0 recast
0 reaction

avi pfp
avi
@avichalp
"Binius’s FPGA prototypes have shown that binary field multiplications can be performed in one clock cycle, making them exponentially more efficient than traditional prime field operations like Mersenne-31, which require 49 clock cycles" https://0xmilica.com/post/binius/
2 replies
4 recasts
25 reactions

cqb pfp
cqb
@cqb
Damn, that's pretty fucking wild actually
1 reply
0 recast
1 reaction

avi pfp
avi
@avichalp
not consumer hardware tho
1 reply
0 recast
1 reaction

cqb pfp
cqb
@cqb
True. Just skimmed the article, did they say which FPGA they did this on? In any case an FPGA is pretty easy to get a hold of, so not at client side mobile proofs yet, but an enthusiast building a power efficient proving node at home territory
1 reply
0 recast
1 reaction

avi pfp
avi
@avichalp
this blog doesn’t mention. maybe binius paper
0 reply
0 recast
1 reaction